Bring each cell group's voltage to the battery management system.
Sense wires from every parallel group to the BMS, which is how EV.8.4.1 cell voltage measurement is satisfied.
No part-specific design process is documented. The Accumulator LV subsystem design process applies: 1. List every low voltage function inside the container and what it must interface with. 2. Decide grounding architecture (star chosen) and lay out the returns. 3. Design the boards, with conformal coating selected against the requirement (acrylic is easier to rework, silicone is more vibration resistant and more temperature tolerant but costs more and is harder to remove). 4. Design HV monitoring: optocoupler (smaller, cheaper, digital, needs conformal coating) against voltage transducer (no conformal coating needed, larger, more expensive, analog). 5. Build the sub-harnesses, test in simulated conditions before the pack is live.
Voltage taps are not fused. This is a known gap and a stated goal to close.
Nothing in CrimsonStorage covers these yet.